1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating such a semiconductor device, and more particularly to a semiconductor device with a capacitive element for use in a VLSI memory circuit such as a dynamic random-access memory (DRAM) or the like and a method of fabricating such a semiconductor device.
2. Description of the Related Art
Efforts have been made to use a high-permittivity capacitive insulating film for a large capacitive value per unit area in capacitive elements of a VLSI memory circuit such as a 256-Mbit DRAM or a memory device of greater storage capability. Many research activities have been directed to a chemical vapor-phase growth process for fabricating such a high-permittivity capacitive insulating film because such a process is capable of producing a film having excellent step coverage characteristics.
FIGS. 1(a) through 1(c) of the accompanying drawings show in cross section the successive steps of a conventional process of fabricating a stacked type capacitive element in a DRAM cell which is connected to a transistor including a bit line 856 through a through hole 857 defined in an interlayer insulating film 848 that covers the transistor.
In the illustrated conventional fabrication process, a tantalum oxide (Ta.sub.2 O.sub.5) film is used as a high-permittivity capacitive insulating film.
First, as shown in FIG. 1(a), a tungsten (W) film is deposited by sputtering on a lower capacitive electrode 802 composed of polysilicon. Generally, the W film is grown to a thickness of 100 nm or greater in order to be uniformly grown in a wafer.
Then, as shown in FIG. 1(b), a tantalum oxide film 811 is formed on the tungsten film by a reduced-pressure chemical vapor-phase growth process using a pentaethoxytantalum (Ta(OC.sub.2 H.sub.5).sub.5) gas which is an organic material. Thereafter, the deposited tantalum oxide film 811 is heat-treated in an oxygen atmosphere in order to improve leak current characteristics thereof.
As shown in FIG. 1(c), an upper capacitive electrode 803 is formed on the tantalum oxide film 811. Generally, the upper capacitive electrode 803 is in the form of a tungsten film. In this manner, a capacitive element is fabricated.
The conventional capacitive structure described above suffers the following problems:
The lower capacitive electrode 802 composed of polysilicon, particularly phosphorus-doped polysilicon, has a substantially flat surface. Recently, there has been developed and put to use a technique to roughen a surface of such phosphorus-doped polysilicon by way of HSG until the surface area thereof is almost doubled.
If, however, a tungsten film is deposited to a thickness of at least 100 nm on the roughened surface of phosphorus-doped polysilicon, then the roughened surface of phosphorus-doped polysilicon will be flattened, eliminating the increase in the surface area thereof. This is because when the thickness of a tungsten film deposited on the roughened surface of phosphorus-doped polysilicon, whose grain size is controlled generally in the range of from 20 to 200 nm, reaches at least 100 nm, tungsten finds its way into particles of the roughened surface of phosphorus-doped polysilicon. Therefore, the surface of phosphorus-doped polysilicon is no longer rough, but made flat and smooth, and, as a result, does not have the increased surface area.
Another problem is that when the tungsten film is deposited by sputtering, a number of additional fabrication steps are necessary in the formation of the lower electrode region.